Author: stnolting

Adding custom RISC-V instructions to an open-source rv32 SoC

github.com

2025-12-302022-02-02 by stnolting

adding-custom-risc-v-instructions-to-an-open-source-rv32-soc

✨[Zxcfu ISA ext.] add option to implement custom RISC-V instructions by stnolting · Pull Request #264 · stnolting/neorv32 · GitHub {{ message }} Add this suggestion to a batch that can be applied as a single commit. This suggestion is … Read more

A generic VHDL touch controller – add capacitive buttons to any FPGA

github.com

2025-12-302021-10-16 by stnolting

a-generic-vhdl-touch-controller-–-add-capacitive-buttons-to-any-fpga

Overview The captouch capacitive touch controller allows to convert any FPGA’s IO pin into a capacitive push button. If a finger gets close enough to a touch button the controller recognizes this by a change of capacitance. The button status … Read more

Show HN: Open-source soft-core RISC-V SoC with gdb support

github.com

2025-12-302021-05-31 by stnolting

show-hn:-open-source-soft-core-risc-v-soc-with-gdb-support

Overview The NEORV32 Processor is a customizable microcontroller-like system on chip (SoC) that is based on the RISC-V NEORV32 CPU. The project is intended as auxiliary processor in larger SoC designs or as ready-to-go stand-alone custom / customizable microcontroller. 📚 … Read more